Current state-of-art lithographic tools are normally capable of providing lithographic patterns, such as contact holes or contact openings, with a resolution of not less than approximately 100 nm in diameter. However, at least in some of the currently available integrated chips, such large size of contact openings is considered as one of the major contributing factors to the undesirable low device density. In the meantime, the ever demanding scaling of semiconductor devices means that future CMOS technology will need to provide sub-50 nm metal contacts for connecting CMOS devices, such as field effect transistors (FETs), to back-end-of-line (BEOL) wiring. It is clear that there is a need for reducing the size of contact openings to a level below resolutions of current and even future-developed lithographic tools, i.e., there is a need for sub-lithography feature patterning technique.
It has been known in the art that certain materials are capable of spontaneously organizing into ordered patterns without the need of human intervention. Such materials are typically known, and are referred to hereinafter, as self-assembling materials. Examples of materials capable of self-assembly range from snowflakes to seashells to sand dunes, all of which may form some type of regular or ordered patterns in response to an existing external or surrounding condition, such as whether the material is in a free or unconstrained space or is bound by a unique boundary or external structure.
Among various self-assembling materials, self-assembling block copolymers are capable of self-organizing into nanometer-scale patterns and therefore are generally considered as particularly promising for enabling future advancement in the semiconductor technology. Each self-assembling block copolymer system typically contains two or more different polymeric block components that are immiscible with one another. Under suitable conditions, the two or more immiscible polymeric block components may separate into two or more different phases on a nanometer scale and form ordered patterns of isolated nano-sized structural units.
Such ordered patterns of structural units formed by self-assembling block copolymers may be used for fabricating nano-scale structural units in semiconductor, optical, and/or magnetic devices. In particular, dimensions of the structural units so formed are typically in the range of 10 nm to 40 nm, which are sub-lithographic (i.e., below the resolutions of current lithographic tools). Furthermore, the self-assembling block copolymers are compatible with processes generally used for conventional semiconductor, optical, and/or magnetic devices. Thus, the ordered patterns of nano-sized structural units formed by such block copolymers, if arranged properly, may be integrated into semiconductor, optical, and magnetic devices where a large, ordered array of repeating structural units are required.
Generally, CMOS technology requires precise placement or registration of individual structural units for formation of metal lines and vias in the wiring levels. The large, ordered array of repeating structural units formed by self-assembling block copolymers could not be directly used in CMOS devices, due to lack of alignment or registration of positions of the individual structural units.